The present invention relates to a novel electroless plating bath to be used for forming a wiring of a semiconductor device, and also to a method of forming a wiring of a semiconductor device with the use of the electroless plating bath above-mentioned.
To deposit a metallic layer which will result in a wiring of a semiconductor device, there has conventionally been used an aluminium sputtering method, a tungsten CVD method, or the like.
However, such a prior art sputtering method or CVD method is disadvantageous in that a sufficient coverage cannot be provided. Also, such a prior art method is disadvantageous in that a large energy is given to the metallic compound to liberate the metal or a large energy is given to separate the metallic compound to be deposited, such that the metal is deposited on the surface of the semiconductor substrate. This not only greatly increases the cost, but also complicates the process.
To achieve the problems above-mentioned, attention has recently been placed on the deposition of a metallic layer using an electroless plating method.
An electroless plating bath having the following composition is proposed by "ELECTROLESS PLATING (1985) Chapter 17 Electroless Plating of Silver N. Koura".
______________________________________ Silver nitrate (silver ion source) 8 .times. 10.sup.-3 mol/l Rochelle salt (reducing agent) 3.5 .times. 10.sup.-2 mol/l Ethylenediamine (complexing agent) 5.4 .times. 10.sup.-2 mol/l 3,5-Diiodotyrosine (stabilizer) 4.0 .times. 10.sup.-5 mol/l NaOH or KOH (pH control agent) pH 10.0 Bath temperature 35.degree. C. ______________________________________
However, when the inventors of the present invention formed a metallic wiring layer of a semiconductor device, using the electroless plating bath above-mentioned, they found that the semiconductor device was deteriorated in characteristics.
After hard study, they found that the electroless plating bath contained metallic impurities (alkali metal, alkali earth metal and the like) such as Na, K and the like, and that after contained in the plated layer serving as wiring metal, such metallic impurities diffused in the semiconductor device to deteriorate the characteristics thereof.
The inventors of the present invention found that the amounts of Na and K in the electroless plating bath above-mentioned as measured by atomic emission spectroscopy (ICP) were as high as 7411 ppm and 6993 ppm, respectively. Further, Na and K are contained even in the deposited silver plated layer. The inventors also found that the amounts of Na and K in the silver layer having a thickness of 0.5 .mu.m deposited on the semiconductor substrate, were 842 ppm and 411 ppm, respectively. These values are much higher than the allowance for the metallic impurities contained in the wiring metal of a semiconductor device.